The present disclosure relates to a nonvolatile memory device, and more particularly, to a vertical nonvolatile memory device.
Recent development in information communication industry has increased the use of various memory devices. For example, memory devices used in cellular phones and MP3 players are required to be nonvolatile to retain recorded data even when not powered. Data can be electrically stored in and erased from nonvolatile memory devices, and stored data can be retained in the nonvolatile memory devices although the nonvolatile memory devices are not powered. Therefore, the nonvolatile memory devices are used in various fields. However, related-art dynamic random access memories (DRAMs) formed of semiconductor materials are volatile, so that all the stored information is erased from the DRAMs if power is not supplied. Thus, research has been conducted to develop nonvolatile memory devices that can be used instead of DRAMs.
Flash memory devices including electrically isolated floating gates are representative nonvolatile memory devices, and much research has been conducted on the flash memory devices. However, recent research is focused on nonvolatile memory devices such as phase change random access memories (PRAMs) using phase change phenomenon, magnetic random access memories (MRAMs) using magnetic resistance change phenomenon, ferroelectric random access memories (FRAMs) using spontaneous polarization phenomenon of ferroelectric, and resistance random access memories (ReRAM) using resistance or conductivity switching phenomenon of metal oxide thin film. Particularly, since ReRAMs have simple structures and manufacturing processes compared with other nonvolatile memory devices, ReRAMs receive attention.
ReRAMs including cross-bar arrays are advantageous in terms of integration. However, ReRAMs including cross-bar arrays have the possibility of reading errors.
For this reason, research has been conducted on a ReRAM 100 shown in FIG. 1. The ReRAM 100 includes resistance recording devices 110 in which memory devices 140 and selective diodes 130 are connected in series. The resistance recording devices 110 are arranged in rows and columns between crossing electrodes 120 and 150. The memory devices 140 include resistance layers so that information can be recorded in the memory devices 140. In addition, the selective diodes 130 allow forward currents but block most of reverse currents so that reading errors can be prevented.
However, integration of such horizontal devices is limited, and thus research is necessary to develop new devices that can be highly integrated.